MARC details
| 000 -LEADER |
|---|
| fixed length control field |
02105cam a22004574a 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
54826075 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
OCoLC |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20170216090228.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
040325t20052005maua b 001 0 eng |
| 015 ## - NATIONAL BIBLIOGRAPHY NUMBER |
|---|
| National bibliography number |
GBA449766 |
| Source |
bnb |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0321149017 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780321149015 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0321269772 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780321269775 |
| 035 ## - SYSTEM CONTROL NUMBER |
|---|
| System control number |
(OCoLC)54826075 |
| Canceled/invalid control number |
(OCoLC)857177164 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
DLC |
| Language of cataloging |
eng |
| Transcribing agency |
DLC |
| Modifying agency |
UKM |
| -- |
BAKER |
| -- |
NLGGC |
| -- |
YDXCP |
| -- |
BTCTA |
| -- |
COO |
| -- |
IG# |
| -- |
DEBBG |
| -- |
OCL |
| -- |
OCLCQ |
| -- |
UKMGB |
| -- |
OCLCF |
| -- |
OCLCO |
| -- |
NJI |
| -- |
OCLCQ |
| -- |
OCLCO |
| -- |
UtOrBLW |
| 042 ## - AUTHENTICATION CODE |
|---|
| Authentication code |
pcc |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7874 |
| Item number |
.W45 2005 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Classification number |
621.395 |
| Edition number |
22 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Weste, Neil H. E |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
CMOS VLSI design : |
| Remainder of title |
a circuits and systems perspective / |
| Statement of responsibility, etc |
Neil H.E. Weste, David Harris |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
Third edition |
| 264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE STATEMENTS |
|---|
| Place of production, publication, distribution, manufacture |
Boston : |
| Name of producer, publisher, distributor, manufacturer |
Pearson/Addison-Wesley, |
| Date of production, publication, distribution, manufacture |
[2005] |
| 264 #4 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE STATEMENTS |
|---|
| Date of production, publication, distribution, manufacture |
℗♭2005 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xxiv, 967 pages : |
| Other physical details |
illustrations ; |
| Dimensions |
24 cm |
| 336 ## - CONTENT TYPE |
|---|
| Content Type Term |
text |
| Content Type Code |
txt |
| Source |
rdacontent |
| 337 ## - MEDIA TYPE |
|---|
| Media Type Term |
unmediated |
| Media Type Code |
n |
| Source |
rdamedia |
| 338 ## - CARRIER TYPE |
|---|
| Carrier Type Term |
volume |
| Carrier Type Code |
nc |
| Source |
rdacarrier |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE |
|---|
| Bibliography, etc |
Includes bibliographical references (pages 927-952) and index |
| 505 0# - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
1. Introduction -- 2. MOS transistor theory -- 3. CMOS processing technology -- 4. Circuit characterization and performance estimation -- 5. Circuit simulation -- 6. Combinatorial circuit design -- 7. Sequential circuit design -- 8. Design methodology and tools -- 9. Testing and verification -- 10. Datapath subsystems -- 11. Array subsystems -- 12. Special-purpose subsystems -- Appendix A. Verilog -- Appendix B. VHDL |
| 530 ## - ADDITIONAL PHYSICAL FORM AVAILABLE NOTE |
|---|
| Additional physical form available note |
Also issued online |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Integrated circuits |
| General subdivision |
Very large scale integration |
| -- |
Design and construction |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name as entry element |
Metal oxide semiconductors, Complementary |
| 655 #7 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Entwurf. |
| Source of term |
swd |
| 655 #4 - INDEX TERM--GENRE/FORM |
|---|
| Genre/form data or focus term |
Entwurf |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Harris, David Money |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| Personal name |
Weste, Neil H. E. |
| Title of a work |
Principles of CMOS VLSI design |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY |
|---|
| Display text |
Online version: |
| Main entry heading |
Weste, Neil H.E. |
| Title |
CMOS VLSI design. |
| Edition |
3rd ed. |
| Place, publisher, and date of publication |
Boston : Pearson/Addison-Wesley, ℗♭2005 |
| Record control number |
(OCoLC)607573162 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Item type |
Books |
